Harvard Architecture Requiem [6]

First posted
Tuesday June 15, 2010 05:52
Thursday December 16, 2010 07:24

ecf51 project. As a result of Prolific serial to USB 2.0 chip and cables along with the DOS window no changes are required to proceed! We're using the ativa sold at Office Depot for $19.99.

Harvard computer architecture is characterized by separate memory spaces for code and data.

Von Neumann aka Princeton computer architecture is characterized by single code and data emory space.

Harvard architecture is implemented in 8051 family microcontrollers with two read control signals. -PSEN and -RD.

- means active low.

PSEN is short for 'program store enable.' RD is short for 'read.'

Transforming an 8051 from Harvard to Princeton architecture is done by ANDing -PSEN and -RD. Here is an example,

In practical terms, this means that using Harvard architecture and 8051 microcontroller family can have 64 k bytes of code memory and 64 k bytes of data memory for a total of 128 k bytes of memory.

Princeton 8051 microcontroller family architecture is limited to 64 k byes of code and data memory.

Forth software technology produces the some of most memory efficient code known.

Sandia labs 8085 and 8051 cryptographic applications [9] could easily be handled using Princeton architecture and Forth so we never implemented a Harvard architecture Forth [1].

Princeton architecture memory and I/O design culminated with 32 k bytes of ROM [EPROM, EEPROM] at addresses 0 - 7FFF hex, 32513 bytes of RAM at addresses 8000 to 8FF0, and 255 byes of I/O space from addresses 8FF1 to 8FFF.

Software development strategy was to develop code by compiling into RAM down/uploading into a forth 8051 system form a PC. Once the code was working properly, then it was metacompiled into the 8051 forth operating system.

And a ROM burned. How could we reduce or eliminate ROM burning?

Thoughts of design of an 8051 forth system which copied minimal forth operating system from ROM into RAM, then executed forth out of RAM has been in our minds for years.

Hardware implementation of these ideas would have been expensive then. Or at least a lot of work if we wire wrapped our implementations [2].

Along comes surface mount, ExpressPCB and non-volitile RAM. Aur ideas hit the drawing board and proceed into quick, inexpensive and reliable implementations.

Netchip USB 2.0 2270 chip was our practice implementation [3].

We learned how to put chips down and remove them [with aluminum foil anti-swim mask covering those chip we did not want to remove] with a Harbor Freight heat gun.

Synthesized Verilog implementations of the 8051 family, even in FPGAs, along with hardware, as opposed to software, implantations of algorithms and processes are causing resurgent interest in the 8051 family. [7][8]

Serial to USB 2.0 adapters may make it possible to develop USB 2.0 code and hardware using the Sandia Labs serial communications 8051 development system.

If so, then we may be able to replace serial communications with USB 2.0 communications on an ExpressPCB Princeton architecture 8051 system where ROM burning is mostly unnecessary.

Then we may have synthesized 8051 Forth application hardware/software systems where engineers prototype innovations by adding surface mount chips to our existing designs.

8051 Forth application systems run on an order of magnitude more reliably [11] than C/assembler implementations. And are easy to modify by downloading source code, then compiling and assembling on the fielded 8051 system.

May the Forth be with you.

Obi-Wan Kenobi?


1 However, a contract to convert our Princeton architecture 8051 Forth to Harvard architecture was issued to Mark Okumura. But the project was never completed.

This turned out fortunate because new memory technologies have nearly, but not quite, killed Harvard architecture.

2 Below is a wire wrapped 8051 forth system bill built in the 1980s.

It worked. And still works.

Note EPROM socket.

We considered adding a EPROM programmer.

Two 8255 chips seen below socket were added to control signals to the EPROM programmer.

And two RAM chips too. 16 k x 8 RAM chips. This was before 32 k x 8 RAM chips.

3   Download Expresspcb before viewing below files.

4 The 2270 was soldered to board using Kester 2331-ZX water soluble rework flux and Kester SN63BP37 solder using a Harbor Freight heat gun.

Solder paste is a better solution we were told by R Y Anderson, designer of the TI MSC1210EVM Analog & Mixed-Signal Evaluation Module.
From: "Russell Anderson" russell.y.anderson@gmail.com
To: bpayne37@comcast.net
Sent: Thursday, June 17, 2010 7:12:54 PM GMT -07:00 US/Canada Mountain
Subject: Re: Returned mail: see transcript for details

Hmmm, I wonder how I get Google to have my correct email.

No I am not working for TI since April 2008. I left TI to come to Utah and work with my brother to develop some gold/silver mining properties in Nevada.

Now I remember. We had some interesting discussions while I was at TI and you were fighting with the government. I don't remember the specifics anymore. How are you doing?


Russell Anderson
3275 W. 7625 S
West Jordan, UT 84084
(801) 609-8586
FAX: (717) 754-9710

On Thu, Jun 17, 2010 at 7:01 PM, bpayne37@comcast.net wrote:

Hello Russ,


Are you still with TI?

Friend Mike Flattley got laid off from TI when he was about 50.

Mike was one of their top salesmen.

He got settlement as part of a class action suit. But he was not part of the action.

Hope you are doing okay.

Mike told me to warn you.

Please criticize my decoding.


My LDS friend, Rodmar Hayes Pulley, in South San Mateo in the early 1950s CA made me appreciate, and understand, Mormon thinking.

I got to attend LDS youth functions as a result of friendship.


Peripheral devices and implemented by placing chips on the board sequentially, then debugging using the 8051 and its forth operating system.

USB 2.0 Netchip board is both 3.3 and 5 volts. Here's the buffer between the 3.3 and 5 volt systems.

This first experience doing surface mount using ExpressPCB revealed that it is easier and cheaper than through-hole or wire warp implementation.

Removing chips from a board is as important and attaching them.

First step is to remove as much solder as possible using flux and solder wick.

Second step is to cover chips not to be removed with aluminum foil.

Third step is to heat the chip with the Harbor Freight heat gun until the solder melts.

Fourth step is to flip the chip to be removed on its back with a tooth pick.

5 Here's the board in preparation for test.

T44 pins were to be placed on the board for test connectors.

Mistake made of too small hole for pin. Pythagorean theorem ignored. Hole size made same as side of T44 distance.

Seen solution was to solder wire to board and wire wrap T44 pin.

Board under test.

In the background you can see the 8051 forth operating system logo. The 8051 uses that PC for its terminal and disk.

Board functions were checked by interactively data/I/O address, then keying Enter.

Logic probe blinked if decode was working. About 15 minutes of interactive test was required to test board.

All board functions worked except the 2270.

More 2270 samples received from Netchip.

But the project was shelved in 2004 to complete this project.

Ativa serial to USB 2.0 purchased.

Drivers installed somewhat okay first on COM4. When we plugged the USB into a second port on the front of our machine, we were instructed to install the drivers again. This time the COM5 is used.

8051 forth terminal emulator does not work with the Ativa serial to USB cable and drivers. We will try to find out why

TI MSC1210EVM is seen below.

Tuesday June 29, 2010 07:10

Mr Anderson's 8051 family evaluation board is remarkable because it apparently is only two-sided.

Expresspcb has a limitation of two side too. 

Look at nice soldering job on fine pitch surface mount.

Solder paste look like the way to go.

Serial communications is used for the MSC1210EVM.

We have TI development system. We are thinking of trying the Ativa serial to USB 2.0 converter cable with it.

Here's MCS1210 software accompanying the evaluation board.

Big bucks in above system.

6 For the 8051 family, of course.

   Speculation is that -RD and -PSEN never go negative simultaneously.
   But we have never tested this.

7 Key words are synthesizable and Verilog.

8051 synthesizable verilog.

8051 one clock per instruction synthesizable verilog.

8 Appearance of below.


NVIDIA M9207 usies a slow 8051.
Built-in High-performance Microcontroller 8051 Engine
12MHz clock rate
Four clocks per instruction cycle
12MHz 8051 operation

motivated these pages.

Jan 21, 2009 ... The R8051XC2 IP core runs with a single clock per machine cycle, and requires an average of 2.12 machine cycles per instruction. ..... The core is available in ASIC (synthesizable HDL) and FPGA (netlist) forms.
Intel 8051 Microprocessor Oral History Panel.

There is a wealth of knowledge and experience, however, it is scattered around and the newbies tend to get the easier path - competing 8-bit microcontrollers usually do have a single-stop information resource site, so this knowledge and experience seems to die out as the "old boys" retire gradually. The price difference between the high-end 8-bitters and the much more powerful low-end 32-bit RISCs (such as the ARMs) seems to decrease rapidly and will change eventually, as the 32-bitters are becoming the standard in all but the least demanding applications. So there is perhaps still a need for the 8051s, but this need is decreasing and 8051s life cycle is slowly approaching its end.

But I might be wrong, of course.

We speculate that Waclawek is wrong for the reason that trends are to move software functions into hardware. Fast microcontoller software of any bit width cannot defeat hardware implementation with respect to speed of execution or reliability.

USB 2.0 is a good example of a task which would be very difficult, if not impossible, to do mostly in software.

What is needed is a reasonably fast super-inexpensive, low-power hardware 'traffic cop' microcontroller with available inexpensive INTERACTIVE METACOMPILABLE operating system hosting an incremental compiler and assembler all available in public domain with lots of SOURCE CODE documentation.

9 History

We're back! After more than 26 years measured from publication of 1984 IEEE Software article on Sandia Labs 8085 forth work which was ported to the 8051 microcontroller family by Jerry Boutelle and Bill Payne.

8085 Sandia-Approved FORTH Article.

Boutelle directed technical software aspects of the project including Payne's coding tasks which were the 8051 assembler, U/, ENCLOSE, and -FIND.

IC@, IC!, the 8051 disassembler and some rewrites of high-level word in assembler were written on Payne's initiative.

Sandia weapons subsystem department manager Dr M Kent Parsons was dissatisfied with the number of peripheral hardware chips required for radiation-hardened 8085 weapon systems.

Assembler implementation of weapons system software with its associated bugs and long development time bothered Parsons too.

Parsons was amazed at how quickly we implemented the Missile Secure Cryptographic Unit with so apparent little work. Others did the systems software work for us!

Parsons ordered project leader Payne to port the 8085 forth system to the 8051 microcontroller and supervise documentation of our work.

Payne was forced to do this work. And wrote a 8051 family embedded controller forth book documenting our ordeal.

Parsons, however, failed to consider opposition from other programmers, especially C programmers, most who hate forth.

Dr Parsons, seen above, retired from Sandia labs to take up new employment.

The National Security Agency funded both the 8085 forth and port to the 8051 family.

10 PR is as important as hardware or software engineering.

Good applied psychology has its role.
TI’s 16-bit open source LaunchPad dev board: $4.30 for the 430 family

'scripting languages pollute'

No Longer Lowly

Freescale's ARM-based Kinetis Is Released: Did ColdFire Just Get Deep-Freezed?

metacompilation payne

Android (operating system)

11 C and assembler comments.

Let's get into why C is another "ho-hum compiler", "an American disease," should be obsolete [like PASCAL], and dangerous for stand-alone embedded applications.
Ted Lewis and bill discuss Pascal, synthesizable cores, USB 2.0, wifi, ... and Joe Weiss on Thursday June 24, 2010.

From: bpayne37@comcast.net To: "meredith"
Sent: Friday, June 25, 2010 11:17:25 AM GMT -07:00 US/Canada Mountain
Subject: Importance of implementing a virtual machine ... on an 8051 core, of course

Hello Meredith,

I reposted

8085 Sandia-Approved FORTH Article.

Contents are probably more relevant today because of demise of Pascal and reliability problems associated with C/assembler embedded controller implementations.

Java is an extension of Forth and is gaining popularity over C. Perhaps becase of greater reliability [doesn't crash a frequently as C apps]? Our Blu-ray DVD is Java powered.

Importance of implementing a virtual machine on a microcontroller is brought to our attention with the Dalvik VM in the Android operating system.

I look forward to talk with you next week.



We're going try to cover some of the reasons why C/assembler should not be used for reliable embedded controller applications.

C has a well-deserved reputation for producing unreliable code because of its internal structures. lack of inherent interactive support from an external computer and cross compiled and assembed code requirements.

This forces inclusion of diagnostic code which attempts to anticipate possible failure modes. Unanticipated failure modes are difficult to debug for the reason lack of interative operating system does not all ability to access the embedded controller from an external machine to 'dink around' to try to discover what happened.
C and assembler can produce messes.

Both are used by people who may not possess embedded controller harware, software, and system knowlege. The lack the understanding of the dangers of what can and eventually likely will go wrong in a microcontroller hardware/software system

Development systems like Keil 8051 allows them to write embedded controller applications, however.

C is not an operating system and especially an interactive operating.

Interactive or batch command interpreter is one of the more powerful features of Forth.

C does not have an interactive command interpreter.

C forces cross compilation and assembly for the reason that a C compiler is difficult or impossible to implment on an 8051 family microcontroller.

Forth is an interactive or batch operating system. In the interactive mode Forth hosts its own incremental compiler and assembler.

Applications code running on a Forth operating system is, in practice, on an order of magnitude more reliable that a C/assembler similar product. There are several, some obscure, reasons for this.

One, not-so-obscure reason is that variables are stored on the stack.

C++ apparently adopts this feature which allows easy implementation of constructors and destructors.

Here are my credentials to make the above statements.

But I made on several orders of magnitude more money writing industrial control MASM, then C++/_asm{}in-line assembler Windows device driver and C APIs for 10 years than I did designing 8051 Forth machine hardware and writing 8051 Forth industrial control apps.

8051 Forth hardware/sofware app, on the other hand, made LOTS of money for company selling continuous lumber testers because of low development cost and EXTREME field reliability.

C and assembler implementations?
What’s All This Smart Grid Stuff, Anyhow?

[N]ow we have the Smart Grid, and smart meters, for gas and electricity. In California, PG&E (Pacific Gas & Electric, also known as Pigs, Greed & Extortion) has connected up to 3.3 million “smart meters,” which are presumably helping people save energy and money. In fact, 99.8% of these meters work fine. Just one leetle problem — more than 5400 customers have had terrible problems with bad meters. They read either much too high or too low. Whichever is the problem, PG&E sends out an estimated bill. Some of these bills are so absurd, the customers are enraged. PG&E apparently did not have any good plans to talk thoughtfully to customers, not any better than AT&T had. So gangs of outraged customers are protesting and marching on PG&E, equipped with pitchforks and torches.* Wouldn’t you be grouchy if you went on a month of vacation and came home to find a $236 bill for electricity, even though you’d turned out all the lights?

Did PG&E have no plans for the possibility that some meters might err? Who designed the meters? Who built the meters? Who ran the quality control on the meters? Who evaluated the meters after they were installed? Who planned the customer relations? Not me! Did these guys all assume that the “smart meters” had to work right because they were all-digital?

Do you trust the people who designed and put out these “smart meters” to run a complete “smart” power grid? I can’t answer any questions. But I am qualified to ask questions. ...

Our answer is, not if they used C and assembler.


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